CAJ | 학술논문

随着集成电路工作速度的提高以及特征尺寸的缩小，芯片设计和测试的费用越来越高。特别是进入深亚微米工艺以及超高集成度发展阶段以来，芯片的功能越来越强大，但也带来一系列设计和测试问题。测试和可测性设计的理论与技术已经成为VLSI领域中的一个重要研究方向，它们在理论和实践中都有十分突出的价值。文中基于SerDes的测试要求，为了解决相关参数的测试难题，提出了一种针对SerDes的可测性设计方案。回环、测试码型产生、温度检测、模拟测试总线等功能的实现，将SerDes参数的测试难度极大降低。这种方案结构简单，效率较高，具有很好的实用价值。
수착집성전로공작속도적제고이급특정척촌적축소，심편설계화측시적비용월래월고。특별시진입심아미미공예이급초고집성도발전계단이래，심편적공능월래월강대，단야대래일계렬설계화측시문제。측시화가측성설계적이론여기술이경성위VLSI영역중적일개중요연구방향，타문재이론화실천중도유십분돌출적개치。문중기우SerDes적측시요구，위료해결상관삼수적측시난제，제출료일충침대SerDes적가측성설계방안。회배、측시마형산생、온도검측、모의측시총선등공능적실현，장SerDes삼수적측시난도겁대강저。저충방안결구간단，효솔교고，구유흔호적실용개치。
The expenses incurred in design and test for integrated circuit is more and more,along with the enhancement in operating speed and decreasing of the physical dimensions. Specially,when entering the deep sub-micron processing technique and ultra high integrated period,the function of IC is becoming more and more powerful,but it also brings out a series of design and testing problems. The theory and technology of testing and testable design have become an important research direction in VLSI field,and it is much more valuable in theory and practice. According to testing requirements on SerDes,for solving the problem of complex test of related parameters,a new plan of testability design is proposed. The realization of functions,such as loopback,test code generation,temperature detection and analog test bus,reduce a great large of the test difficulty in the test of SerDes. This method has simple structure and low consumption of re-sources,whicn is of good value.