CAJ | 학술논문

提出并实现了一种基于ADI TigerSHARC101 Link协议的高速通信收发器TPGA设计方案，能同时在接口时钟的上升沿和下降沿收发数据，进而实现FPGA与DSP、以及FPGA片间的无缝连接．经ISE综合与布局布线验证，整个系统仅占用452个Slice，最高工作频率超过300 MHz，数据传输率可达4．8 Gb／s．
제출병실현료일충기우ADI TigerSHARC101 Link협의적고속통신수발기TPGA설계방안，능동시재접구시종적상승연화하강연수발수거，진이실현FPGA여DSP、이급FPGA편간적무봉련접．경ISE종합여포국포선험증，정개계통부점용452개Slice，최고공작빈솔초과300 MHz，수거전수솔가체4．8 Gb／s．
A high-rate transceiver FPGA strategy based on ADI TigerSHARC101 Link protocol was presented, which can complete data exchange both on rising edge and falling edge of interface clock, The seamless connection be-tween FPGA and DSP/FPGA was achieved.After ISE synthesis and routing, the highest work clock of whole system can achieve 300 MHz, with only 452 slices utilized.The equivalent transmitting rate was 4.8 Gb/s.