CAJ | 학술논문

设计了一种具有低插入损耗、低相位误差的5位 CMOS 集总式衰减器.该衰减器基于0.18μm CMOS工艺,采用桥T和π形衰减结构,通过 NMOS晶体管开关控制5个独立的衰减模块,在5~20 GHz的工作频段范围内实现步长1 dB、动态范围0~31 dB的信号幅度衰减.其中,串联控制开关管采用体端通过电阻与源极相连的结构,在不增加寄生电容的前提下,降低导通电阻；并联控制开关采用体端交流悬浮结构,以提高整体衰减器的线性度.较大衰减量的衰减模块采用电感进行补偿,以减小附加相移.仿真结果显示,该衰减器插入损耗最小为6.1 dB,最大为12.6 dB,各状态衰减量均方根小于0.5 dB,附加相移均方根小于3.4°,中心频率处1 dB压缩点为14.13 dBm.
설계료일충구유저삽입손모、저상위오차적5위 CMOS 집총식쇠감기.해쇠감기기우0.18μm CMOS공예,채용교T화π형쇠감결구,통과 NMOS정체관개관공제5개독립적쇠감모괴,재5~20 GHz적공작빈단범위내실현보장1 dB、동태범위0~31 dB적신호폭도쇠감.기중,천련공제개관관채용체단통과전조여원겁상련적결구,재불증가기생전용적전제하,강저도통전조；병련공제개관채용체단교류현부결구,이제고정체쇠감기적선성도.교대쇠감량적쇠감모괴채용전감진행보상,이감소부가상이.방진결과현시,해쇠감기삽입손모최소위6.1 dB,최대위12.6 dB,각상태쇠감량균방근소우0.5 dB,부가상이균방근소우3.4°,중심빈솔처1 dB압축점위14.13 dBm.
A 5~20GHz lumped CMOS attenuator with a low insertion loss and a low phase error is presented.The attenuator is based on bridged-T andπtype attenuative networks and implemented with 0.1 8μm CMOS technology,and it operates with 5 independent attenuative modules by NMOS switches.At the frequency range of 5~20 GHz,the attenuator has a 0~31 dB attenuation range with 1 dB increase.In the attenuator,the series switches are body-source connected by a resistor to minimize the insertion loss without involving too much capacitance,and the shunt switches are ac bodyfloated to improve linearity.The larger attenuative modules are compensated for insertion phase with inductors.As the layout simulation results show,the minimum insertion loss is 6.1 dB and the maximum one is 1 2.6 dB.The root mean square (RMS) attenuative amplitude is less than 0.5 dB,and the RMS insertion phase is less than 3.4°.The 1 dB compression point at the center frequency is 14.13 dBm.