基于FPGA的SDH系统帧同步的研究与实现
기우FPGA적SDH계통정동보적연구여실현
Research and Implementation of Frame Synchronization in SDH System Based on FPGA
  • 万方数据
    空间电子技术 공간전자기술
    SPACE ELECTRONIC TECHNOLOGY
    2015年 1期 89-92 ,共4页

    崔涛%呼延烺%周诠%黎军

    최도%호연랑%주전%려군

    SDH%帧同步%FPGA SDH%幀同步%FPGA
    SDH%정동보%FPGA
    SDH%Frame synchronization%FPGA
    文章介绍了SDH系统中帧同步的设计思想，分析了影响帧同步器性能的参数选择，并分析了一种并行帧同步器的设计思路，在此基础上，采用FPGA设计方法实现了用于SDH系统的STM-4的并行帧同步器，并进行了仿真分析。
    문장개소료SDH계통중정동보적설계사상，분석료영향정동보기성능적삼수선택，병분석료일충병행정동보기적설계사로，재차기출상，채용FPGA설계방법실현료용우SDH계통적STM-4적병행정동보기，병진행료방진분석。
    The design of SDH frame synchronization is introduced in this paper, and parameters of this frame synchroni-zation are selected based on the analyzing of system performances, and a design of parallel frame synchronization is ana-lyzed. Based on above analysis, the STM-4 parallel frame synchronization is implemented based on FPGA, and is analyzed by simulation software.
    원문보기 원문다운로드 사이트로이동
저자의 최근 논문