航空计算技术
航空計算技術
항공계산기술
AERONAUTICAL COMPUTER TECHNIQUE
2015年
2期
113-117
,共5页
DSP%片上数据存储%统一存取%非连续字节编址%SPRAM
DSP%片上數據存儲%統一存取%非連續字節編阯%SPRAM
DSP%편상수거존저%통일존취%비련속자절편지%SPRAM
DSP%on-chip data storage%unified access%non-continuous byte addressing%SPRAM
针对DSP应用领域高实时性和大容量存储的需求，提出了一种基于MCU-DSP融合架构处理器的可配置片上数据存储统一存取设计方法。介绍了片上数据存储的总体结构与其内部数据存储的组织结构，采用非连续字节编址模式和特殊的访存地址分割与组合，结合类零级 Cache 的数据行缓存，实现了片上数据存储 Cache 和SPRAM（Scratch-pad RAM）的可配置与高速统一存取。
針對DSP應用領域高實時性和大容量存儲的需求，提齣瞭一種基于MCU-DSP融閤架構處理器的可配置片上數據存儲統一存取設計方法。介紹瞭片上數據存儲的總體結構與其內部數據存儲的組織結構，採用非連續字節編阯模式和特殊的訪存地阯分割與組閤，結閤類零級 Cache 的數據行緩存，實現瞭片上數據存儲 Cache 和SPRAM（Scratch-pad RAM）的可配置與高速統一存取。
침대DSP응용영역고실시성화대용량존저적수구，제출료일충기우MCU-DSP융합가구처리기적가배치편상수거존저통일존취설계방법。개소료편상수거존저적총체결구여기내부수거존저적조직결구，채용비련속자절편지모식화특수적방존지지분할여조합，결합류령급 Cache 적수거행완존，실현료편상수거존저 Cache 화SPRAM（Scratch-pad RAM）적가배치여고속통일존취。
A design of unified access of configurable on-chip data storage based on MCU-DSP hybrid ar-chitecture processor was proposed to meet the requirements of the high real-time and high-capacity stor-age in DSP system application field .The overall structure of the on-chip data storage and the organiza-tional structure of the internal data storage was described firstly in this paper .The design method proposed in this paper used both the non-continuous byte addressing mode and the segmentation and? combination of the special access address .We made use of the data line buffer which was similar to the zero -level Cache.The method was able to configure and rapidly unified access the Cache and SPRAM of on-chip data storage by using the data line buffer .
