CAJ | 학술논문

针对模拟元件制做的传统接收机的相关设备由于工作频率较高导致对元件参数要求高，电路布局布线困难等问题，提出一种利用FPGA芯片作为接收机的重要组成部分，结合简单外围硬件电路共同组成接收机的新方法。通过FPGA的差分I/O引脚完成接收机的模数转换功能，在集成设计环境Vivado中通过调用IP核的方法实现数字下变频和信号解调等功能。实验结果表明，该系统具有成本低、响应快、可靠性高的特点。
침대모의원건제주적전통접수궤적상관설비유우공작빈솔교고도치대원건삼수요구고，전로포국포선곤난등문제，제출일충이용FPGA심편작위접수궤적중요조성부분，결합간단외위경건전로공동조성접수궤적신방법。통과FPGA적차분I/O인각완성접수궤적모수전환공능，재집성설계배경Vivado중통과조용IP핵적방법실현수자하변빈화신호해조등공능。실험결과표명，해계통구유성본저、향응쾌、가고성고적특점。
The high operating frequency of the traditional receiver and related equipment made by analog components leads to high requirements of the component parameters and circuit layout. Focused on this problem,a new method is presented by using a high-speed digital processor chip FPGA as an important part of the receiver,combined the simple peripheral hardware circuit into the complete receiver. FPGA differential I/O pins can be used as a comparator to complete the conversion function;the method of invocating IP core in Vivado integrated design environment can realize the digital down-conversion and signal demodulation function. The experimental results show that,the system has the characteristics of low cost,fast response,high reliability.