电子与封装
電子與封裝
전자여봉장
EIECTRONICS AND PACKAGING
2015年
3期
9-13,17
,共6页
亚阈值MOSFET%电压基准源%PVT恒定%低工作电压
亞閾值MOSFET%電壓基準源%PVT恆定%低工作電壓
아역치MOSFET%전압기준원%PVT항정%저공작전압
sub-threshold MOSFETS%voltage reference%PVT invariant%low supply voltage
提出一种基于SMIC 65 nm标准CMOS工艺库的高精度电压参考源电路。对3种不同类型偏置于亚阈值区的NMOSFET进行了讨论,采用无电阻温度补偿对温度进行高阶补偿,可以减小对工艺、电压、温度的敏感性。仿真结果表明:在不同工艺角下,电源电压、温度使基准电压Vref的变化仅为±1.36%。电压参考源的温度系数大约为4.5×10-6℃-1,电源线性调制率为2.1% mV·V-1,最小工作电压仅为0.56 V。
提齣一種基于SMIC 65 nm標準CMOS工藝庫的高精度電壓參攷源電路。對3種不同類型偏置于亞閾值區的NMOSFET進行瞭討論,採用無電阻溫度補償對溫度進行高階補償,可以減小對工藝、電壓、溫度的敏感性。倣真結果錶明:在不同工藝角下,電源電壓、溫度使基準電壓Vref的變化僅為±1.36%。電壓參攷源的溫度繫數大約為4.5×10-6℃-1,電源線性調製率為2.1% mV·V-1,最小工作電壓僅為0.56 V。
제출일충기우SMIC 65 nm표준CMOS공예고적고정도전압삼고원전로。대3충불동류형편치우아역치구적NMOSFET진행료토론,채용무전조온도보상대온도진행고계보상,가이감소대공예、전압、온도적민감성。방진결과표명:재불동공예각하,전원전압、온도사기준전압Vref적변화부위±1.36%。전압삼고원적온도계수대약위4.5×10-6℃-1,전원선성조제솔위2.1% mV·V-1,최소공작전압부위0.56 V。
The paper presents a pure CMOS high precision voltage reference circuit based on the sub-threshold MOSFETs with the SMIC 65 nm standard CMOS process technique. Three different types of NMOSFETs and further resister-less temperature compensation are used to reduce process, voltage and temperature(PVT)sensitivity. Simulation result shows that voltage and temperature varies have little effect on the current according different process corners(Vref variation is only ±1.36%). Temperature and power supply sensitivity of the reference voltage is 4.5×10-6℃-1(-500~1500℃)and 2.1% mV·V-1. In addition, the supply voltage is about 0.56 V.