CAJ | 학술논문

在OQPSK调制的数字无线通信系统中,利用时域自相关算法进行频偏估计时需要进行大量自相关运算,导致运算复杂度较高。针对该问题,对基于相邻接收信号自相关函数相位差的频偏估计算法进行优化,提出一种适合现场可编程门阵列( FPGA)实现的硬件方案。通过对三口RAM读地址的控制进行数据连接实现串行运算,节省了大量硬件资源。使用加减运算对滑动自相关运算进行改进,降低了运算复杂度。对整个系统进行时序仿真验证,结果表明,FPGA实现的频偏估计结果接近于真实值,证明了方案的可行性及算法的正确性。
재OQPSK조제적수자무선통신계통중,이용시역자상관산법진행빈편고계시수요진행대량자상관운산,도치운산복잡도교고。침대해문제,대기우상린접수신호자상관함수상위차적빈편고계산법진행우화,제출일충괄합현장가편정문진렬( FPGA)실현적경건방안。통과대삼구RAM독지지적공제진행수거련접실현천행운산,절성료대량경건자원。사용가감운산대활동자상관운산진행개진,강저료운산복잡도。대정개계통진행시서방진험증,결과표명,FPGA실현적빈편고계결과접근우진실치,증명료방안적가행성급산법적정학성。
In the digital wireless communication system of OQPSK modulation, a large amount of autocorrelation is required for frequency offset estimation based on time domain autocorrelation, which leads to high computational complexity. To overcome this drawback, an optimization algorithm being suitable for Field Programmable Gate Array (FPGA) implementation of the frequency offset estimation is proposed,which is based on the phase difference of the adjacent received signals autocorrelation. In this paper, the serial computation is realized by controlling the three-port RAM’s read address to achieve data connection,which saves a number of hardware resources. In terms of algorithms, addition and subtraction are utilized to improve sliding autocorrelation, which reduces the computational complexity. Finally,the timing simulation for the whole system is carried out. A good agreement between simulated results and true values is obtained. The feasibility of the scheme and the correctness of the algorithm are validated.