CAJ | 학술논문

针对门级电压分配算法速度慢的问题，提出了一种时延约束下基于门分组的双电压分配算法。通过门工作在低、高电压下的延时差与时延裕量的比较，将门分为高电压门组和低电压门组；针对违反时延约束的关键路径上的低电压门（称为关键低电压门），采用最小割法逐渐升高其电压至电路满足时延约束。通过对ISCAS’85标准电路测试的实验结果表明，与已发表的算法比较，不但功耗有一定改进，且算法速度快。
침대문급전압분배산법속도만적문제，제출료일충시연약속하기우문분조적쌍전압분배산법。통과문공작재저、고전압하적연시차여시연유량적비교，장문분위고전압문조화저전압문조；침대위반시연약속적관건로경상적저전압문（칭위관건저전압문），채용최소할법축점승고기전압지전로만족시연약속。통과대ISCAS’85표준전로측시적실험결과표명，여이발표적산법비교，불단공모유일정개진，차산법속도쾌。
Against the low speed of gate-level voltage assignment algorithm, a gate grouping based dual-voltage assign-ment algorithm under timing constraint is proposed. Through comparing gate delay difference working under low and high voltage and its slack, all gates are classified into high voltage gate group and low voltage gate group. Against so-called critical low voltage gates violating timing constraint on critical paths, the min-cut method is employed to gradu-ally increase the applied voltage until the circuit meets timing constraint. The experimental results on ISCAS’85 bench-marks indicate that compared with the published algorithms, the proposed algorithm not only can reduce power dissipa-tion, but also can improve algorithm speed.