液晶与显示
液晶與顯示
액정여현시
CHINESE JOURNAL OF LIQUID CRYSTALS AND DISPLAYS
2015年
3期
467-471
,共5页
张军%苏子芳%关星%赵哲
張軍%囌子芳%關星%趙哲
장군%소자방%관성%조철
液晶显示面板%栅极驱动电路%高分辨率%窄边框
液晶顯示麵闆%柵極驅動電路%高分辨率%窄邊框
액정현시면판%책겁구동전로%고분변솔%착변광
LCD panel%gate driver%high resolution%narrow border
为了满足市场对 LCD面板高分辨率、窄边框的需求,面板设计引入了玻璃上集成栅极驱动设计.本文对传统液晶显示面板栅极电路设计做了介绍,分析了集成栅极驱动电路技术在实现显示面板窄边框化时的优缺点.提出了一种新型栅极驱动电路,将空间控制转化为时间控制,使用一条栅极走线控制两行甚至多行像素.模拟分析结果表明:新型栅极驱动电路在关态下会产生2.5 V的较小噪声;栅极信号的上升沿及下降沿的时间延迟总和只有3.5μs,可以实现像素节点的正常充放电并完成显示面板的正常显示.同时,本文提出的新型驱动电路可成倍减少显示面板边框栅极走线数量,减少栅极走线所占用的空间,实现高分辨率高解析度显示面板的窄边框化设计.
為瞭滿足市場對 LCD麵闆高分辨率、窄邊框的需求,麵闆設計引入瞭玻璃上集成柵極驅動設計.本文對傳統液晶顯示麵闆柵極電路設計做瞭介紹,分析瞭集成柵極驅動電路技術在實現顯示麵闆窄邊框化時的優缺點.提齣瞭一種新型柵極驅動電路,將空間控製轉化為時間控製,使用一條柵極走線控製兩行甚至多行像素.模擬分析結果錶明:新型柵極驅動電路在關態下會產生2.5 V的較小譟聲;柵極信號的上升沿及下降沿的時間延遲總和隻有3.5μs,可以實現像素節點的正常充放電併完成顯示麵闆的正常顯示.同時,本文提齣的新型驅動電路可成倍減少顯示麵闆邊框柵極走線數量,減少柵極走線所佔用的空間,實現高分辨率高解析度顯示麵闆的窄邊框化設計.
위료만족시장대 LCD면판고분변솔、착변광적수구,면판설계인입료파리상집성책겁구동설계.본문대전통액정현시면판책겁전로설계주료개소,분석료집성책겁구동전로기술재실현현시면판착변광화시적우결점.제출료일충신형책겁구동전로,장공간공제전화위시간공제,사용일조책겁주선공제량행심지다행상소.모의분석결과표명:신형책겁구동전로재관태하회산생2.5 V적교소조성;책겁신호적상승연급하강연적시간연지총화지유3.5μs,가이실현상소절점적정상충방전병완성현시면판적정상현시.동시,본문제출적신형구동전로가성배감소현시면판변광책겁주선수량,감소책겁주선소점용적공간,실현고분변솔고해석도현시면판적착변광화설계.
In order to meet the requirement of the market for LCD panel’s high resolution and narrow frame performance,the gate driver in array(GIA)employing a_Si∶H TFTs technology has emerged in recent years.This paper briefly introduced the operation principle of the traditional integrated gate driver and its effects on LCD panel design,then proposed a novel gate driving circuit through single gate to control rows of pixels,so that the number of gate lines can be sharply decreased which result in saving much more space for narrow bezel design.Simulation results show that a little noise with 2.5 V happens at off-state of the new circuit’s gate line,and the delay time of the gate waveform at both the rising and falling edge is only 3 .5μs,totally.The charging and discharging of pixel can a-chieve for normal display.At the same time,the new driving circuit proposed in this paper can greatly reduce frame border of panel,through the way of reducing the number of gate fanout lines.