计算机工程与设计
計算機工程與設計
계산궤공정여설계
COMPUTER ENGINEERING AND DESIGN
2015年
6期
1519-1523,1529
,共6页
李晓花%王雅云%于锋%丁传红
李曉花%王雅雲%于鋒%丁傳紅
리효화%왕아운%우봉%정전홍
星载计算机%静态随机存储器 (SRAM )%单粒子多位翻转%数据交错%高可靠性
星載計算機%靜態隨機存儲器 (SRAM )%單粒子多位翻轉%數據交錯%高可靠性
성재계산궤%정태수궤존저기 (SRAM )%단입자다위번전%수거교착%고가고성
on-board computer%SRAM memory%multiple bit upset%data-level interleaving%high reliability
为提高传统纠检错（error detection and correction ， EDAC）模块对星载SRAM 中单粒子多位翻转（multiple bit upsets ， MBU ）的纠错率，提出一种能同时纠正多比特位翻转的技术，称为数据交错技术。参照版图交错法的原理，在FPGA的软件设计等级实现数据的交错存储，将单粒子的多位翻转分离后，分别通过EDAC模块纠正。仿真结果表明，该数据交错技术与（12，8）汉明码及（21，16）汉明码结合后，可将传统EDAC模块对单粒子引起的两位及三位翻转的纠错率从53?69％及28?91％提升至99?82％，以较低代价，实现了MBU大部分翻转形式的纠正。
為提高傳統糾檢錯（error detection and correction ， EDAC）模塊對星載SRAM 中單粒子多位翻轉（multiple bit upsets ， MBU ）的糾錯率，提齣一種能同時糾正多比特位翻轉的技術，稱為數據交錯技術。參照版圖交錯法的原理，在FPGA的軟件設計等級實現數據的交錯存儲，將單粒子的多位翻轉分離後，分彆通過EDAC模塊糾正。倣真結果錶明，該數據交錯技術與（12，8）漢明碼及（21，16）漢明碼結閤後，可將傳統EDAC模塊對單粒子引起的兩位及三位翻轉的糾錯率從53?69％及28?91％提升至99?82％，以較低代價，實現瞭MBU大部分翻轉形式的糾正。
위제고전통규검착（error detection and correction ， EDAC）모괴대성재SRAM 중단입자다위번전（multiple bit upsets ， MBU ）적규착솔，제출일충능동시규정다비특위번전적기술，칭위수거교착기술。삼조판도교착법적원리，재FPGA적연건설계등급실현수거적교착존저，장단입자적다위번전분리후，분별통과EDAC모괴규정。방진결과표명，해수거교착기술여（12，8）한명마급（21，16）한명마결합후，가장전통EDAC모괴대단입자인기적량위급삼위번전적규착솔종53?69％급28?91％제승지99?82％，이교저대개，실현료MBU대부분번전형식적규정。
To improve the MBU error correction rate in on‐board SRAM by conventional error detection and correction (EDAC) module ,a technique called data‐level interleaving technique was proposed .With reference to the principles of layout interleaving scheme ,interleaving storage of data was accomplished by means of FPGA software programming .Adjacent errors were parted into separate ones and then they were corrected respectively using EDAC .Experimental results show that the error correction rate of double and triple upsets by (12 ,8) Hamming code is only 53?69% ,and that by (21 ,16) Hamming codes is 28?91% . After combined with this data‐level interleaving technique ,they can both reach 99?82% .It realizes the correction of a large part of MBU at a low cost .
