CAJ | 학술논문

串行数据率的不断提高使得传输信号的波长和板中传输线长度可比拟，分布参数显现出不可忽视的影响。文中提出了一种全信道仿真的方法，在HFSS软件中对倒装焊管壳进行建模，在SiWave软件中对PCB链路进行分析，并分别提取出S参数和Spice网表，以及高速数模混合SoC芯片中SerDes接口中Tx及Rx模块版图寄生参数提取后的RCX网表。在Cadence Spectre软件下进行协同仿真的方法，较好地预计出了高速数模混合倒装焊芯片在版图、封装、管壳以及信道影响情况下的传输特性，为电路设计以及改进提供了依据。
천행수거솔적불단제고사득전수신호적파장화판중전수선장도가비의，분포삼수현현출불가홀시적영향。문중제출료일충전신도방진적방법，재HFSS연건중대도장한관각진행건모，재SiWave연건중대PCB련로진행분석，병분별제취출S삼수화Spice망표，이급고속수모혼합SoC심편중SerDes접구중Tx급Rx모괴판도기생삼수제취후적RCX망표。재Cadence Spectre연건하진행협동방진적방법，교호지예계출료고속수모혼합도장한심편재판도、봉장、관각이급신도영향정황하적전수특성，위전로설계이급개진제공료의거。
The paracitic effect has played a more important role when the waveform length has compared to the channel length in terms of increasing baudrate of serial communication. In this paper,a full channel simulation method has been proposed. The flip-chip package model has been extracted using HFSS,the PCB channel has been analyzed in SiWave as while,both S parameter and Spice model has been extracted and simulated with Rx and Tx RCX netlist using Spectre simulator. The simulation has accurately predicted the perform-ance of high speed circuit with parasitic effect of layout,package,channel,and the method is an effective way for circuit optimization.