计算机工程与设计
計算機工程與設計
계산궤공정여설계
COMPUTER ENGINEERING AND DESIGN
2015年
7期
1752-1756
,共5页
归并插入排序%快速中值滤波器%比较次数%现场可编程门阵列 (FPGA )%实时性
歸併插入排序%快速中值濾波器%比較次數%現場可編程門陣列 (FPGA )%實時性
귀병삽입배서%쾌속중치려파기%비교차수%현장가편정문진렬 (FPGA )%실시성
merge insertion sort%fast median filter%number of comparisons%FPGA%real-time
针对数字图像噪声抑制过程中去噪性能要求较高、处理速度要求较快的问题,以常规中值滤波算法为基础,提出用归并插入排序算法来实现5×5快速中值滤波器的方案。通过对滤波窗口中行列像素点以及对角线上的像素点的归并插入排序,得到窗口的中值,在Xilinx的ISE10.0软件开发环境下成功完成该算法硬件设计。相比常规算法,该方案简单易行、运算速度快,能够满足实时性的要求,易在现场可编程门阵列(FPGA )上实现,为实时性要求较高的图像去噪领域提供了可靠的技术支持。
針對數字圖像譟聲抑製過程中去譟性能要求較高、處理速度要求較快的問題,以常規中值濾波算法為基礎,提齣用歸併插入排序算法來實現5×5快速中值濾波器的方案。通過對濾波窗口中行列像素點以及對角線上的像素點的歸併插入排序,得到窗口的中值,在Xilinx的ISE10.0軟件開髮環境下成功完成該算法硬件設計。相比常規算法,該方案簡單易行、運算速度快,能夠滿足實時性的要求,易在現場可編程門陣列(FPGA )上實現,為實時性要求較高的圖像去譟領域提供瞭可靠的技術支持。
침대수자도상조성억제과정중거조성능요구교고、처리속도요구교쾌적문제,이상규중치려파산법위기출,제출용귀병삽입배서산법래실현5×5쾌속중치려파기적방안。통과대려파창구중행렬상소점이급대각선상적상소점적귀병삽입배서,득도창구적중치,재Xilinx적ISE10.0연건개발배경하성공완성해산법경건설계。상비상규산법,해방안간단역행、운산속도쾌,능구만족실시성적요구,역재현장가편정문진렬(FPGA )상실현,위실시성요구교고적도상거조영역제공료가고적기술지지。
For the problems in the process of filtering out the noise of image denoising effect and high demand of data processing speed ,based on the conventional median filtering algorithm ,merge insertion sort algorithm was proposed to implement the 5 × 5 fast median filter .By sorting the ranks pixels in the filtering window and the pixels in the diagonal line in merge insertion sort , the median of the window was obtained at least in a minimum number of comparisons .The hardware of the algorithm was suc‐cessfully designed in the Xilinx of ISE10.0 software development environment .Compared with the conventional algorithm ,this scheme is simple and fast on calculation speed that can satisfy the requirement of real‐time and it is easy to implement on FPGA , which provides reliable technical supports for real‐time demanded fields of image denoising .