CAJ | 학술논문

为解决多通道高速同步采集记录系统中的通道扩展、采集同步等问题，建立一个采用通用接口、模块化可扩展的高速同步记录系统。由时钟模块输出同步时钟并触发信号控制采集模块，数据在主板控制器下通过 PCIE接口写入存储模块，时钟模块一级级联实现128路采集记录。在此架构下，设计采集模块上的FPGA逻辑结构，实现多种触发和采集功能。经实例测试验证，该系统实现了14 bit 180 M Hz连续采样，同步性能稳定，通带较平坦。
위해결다통도고속동보채집기록계통중적통도확전、채집동보등문제，건립일개채용통용접구、모괴화가확전적고속동보기록계통。유시종모괴수출동보시종병촉발신호공제채집모괴，수거재주판공제기하통과 PCIE접구사입존저모괴，시종모괴일급급련실현128로채집기록。재차가구하，설계채집모괴상적FPGA라집결구，실현다충촉발화채집공능。경실례측시험증，해계통실현료14 bit 180 M Hz련속채양，동보성능은정，통대교평탄。
To solve the channel expansion and synchronization problems of the high‐speed multi‐channel synchronous acquisition and recording system ,a set of system was designed with general interface and extendable module ,whose clock module outputted synchronous clock and triggered signal to control the acquisition module ,and the acquired data were written in the memory module by the motherboard controller through PCIE interface .128‐way acquisition record was achieved in the one cascade clock module .In this architecture ,FPGA logical structure was designed in the acquisition module to realize a variety of trigger and acquisition function .Results of instant tests show that 14bit 180M Hz continuous sampling can be realized with a stable synchro‐nization performance and a relatively flat band using the proposed method .