CAJ | 학술논문

从芯片的角度深入分析当前图像处理系统的特点，针对当前基于ARM的嵌入式图像处理系统前端采集速度慢和中端图像处理算法不易采用FPGA硬件加速的缺点，为提高前端的采集速度，也为方便中端对各种图像处理算法进行FPGA硬件加速和后端传输显示的设计，选用内部集成有ARM＋FPGA体系结构的Zynq芯片，利用软硬协同设计的方法完成图像处理系统平台原型机的设计，并分析该系统平台的性能。测试结果表明，系统平台的前端采集速度较单纯使用ARM芯片的方案提高了234倍，也为各种中端图像处理算法提供了可扩展的FPGA硬件加速通道，同时还为后端结果显示提供了良好支持。
종심편적각도심입분석당전도상처리계통적특점，침대당전기우ARM적감입식도상처리계통전단채집속도만화중단도상처리산법불역채용FPGA경건가속적결점，위제고전단적채집속도，야위방편중단대각충도상처리산법진행FPGA경건가속화후단전수현시적설계，선용내부집성유ARM＋FPGA체계결구적Zynq심편，이용연경협동설계적방법완성도상처리계통평태원형궤적설계，병분석해계통평태적성능。측시결과표명，계통평태적전단채집속도교단순사용ARM심편적방안제고료234배，야위각충중단도상처리산법제공료가확전적FPGA경건가속통도，동시환위후단결과현시제공료량호지지。
From the angle of the chip, the characteristics of the current image processing system were deeply analyzed.Aiming at the shortcomings of the current embedded image processing system based on ARM that in the anterior the acquisition speed is slow and in the middle the image processing algorithms are not easy to be accelerated by FPGA hardware, in order to improve the speed of the anterior acquisition, also in order to facilitate various image processing algorithms to be accelerated by FPGA hard-ware in the middle and the design of the transmission and display in the posterior, Zynq chip whose internal integrated ARM and FPGA architecture was selected, a image processing system platform prototype was designed by software and hardware co-design method, and the performance of the system platform was analyzed.Test results show that, the anterior acquisition speed of the system platform compared with the use of pure ARM chip solution is improved by 234 times, the system platform also provides ex-tensible FPGA hardware accelerated channel for the middle image processing algorithms, and also provides good support for the posterior results show.