CAJ | 학술논문

在CMOS（Complementary Metal-Oxide-Semiconductor，互补式金属-氧化物-半导体）器件制造工艺中，通常都需要集成PIP（Polysilicon-Insulator-Polysilicon，多晶硅-介电层-多晶硅）电容，该电容的制作非常重要。介绍了PIP电容的4种制作工艺，并分别对比了优劣。4种方法分别是：将PIP制作步骤放在第一层多晶硅刻蚀之后，将PIP制作步骤放在侧墙氧化层刻蚀之后，将PIP制作步骤放在源漏离子注入之后，将PIP制作步骤放在第一层多晶硅沉积之后。由于PIP工艺中的热过程对CMOS器件会有影响，且不同的PIP工艺对单项工艺的要求不同，所以这4种方法对器件参数的影响会各有不同。最后通过实际流片验证，证实了第四种方法对器件参数影响最小，且工艺难度最小，与理论分析完全一致。
재CMOS（Complementary Metal-Oxide-Semiconductor，호보식금속-양화물-반도체）기건제조공예중，통상도수요집성PIP（Polysilicon-Insulator-Polysilicon，다정규-개전층-다정규）전용，해전용적제작비상중요。개소료PIP전용적4충제작공예，병분별대비료우렬。4충방법분별시：장PIP제작보취방재제일층다정규각식지후，장PIP제작보취방재측장양화층각식지후，장PIP제작보취방재원루리자주입지후，장PIP제작보취방재제일층다정규침적지후。유우PIP공예중적열과정대CMOS기건회유영향，차불동적PIP공예대단항공예적요구불동，소이저4충방법대기건삼수적영향회각유불동。최후통과실제류편험증，증실료제사충방법대기건삼수영향최소，차공예난도최소，여이론분석완전일치。
In the manufacturing process of CMOS (Complementary Metal-Oxide-Semiconductor), the capacitance of PIP (Polysilicon-Insulator-Polysilicon) usually needs to be integrated. Therefore, the production of the capacitance is very important. The passage introduced four methods of manufacturing process of PIP capacitance and compared their advantages and disadvantages respectively, of which key is when to take the manufacturing steps of PIP, that is, after the first polysilicon etching of layer, after the etching of spacer oxide layer, after the ion implanting of the source & drain, or after the polysilicon deposition of the first layer. The thermal budget will influence the CMOS in the PIP manufacturing process, and different PIP processes will require seperate module process, so these four methods will have different effects on the device. Finally, the fourth method has the least impacts on the device and the least difficulties in the process, consistent with the theoretical analysis by actual wafer running.