计算机科学技术学报（英文版）
計算機科學技術學報（英文版）
계산궤과학기술학보（영문판）
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
2015年
5期
1154-1160
,共7页
侯睿%武继刚%陈亚文%张海波%隋秀峰
侯睿%武繼剛%陳亞文%張海波%隋秀峰
후예%무계강%진아문%장해파%수수봉
network reliability%homogeneous fault%fault tolerance%reconfigurable system%network-on-chip
In order to build a fault-tolerant network, heterogeneous facilities are arranged in the network to prevent homogeneous faults from causing serious damage. This paper uses edge-colored graph to investigate the features of a network topology which is survivable after a set of homogeneous devices malfunction. We propose an approach to designing such networks under arbitrary parameters. We also show that the proposed approach can be used to optimize inter-router connections in network-on-chip to reduce the additional consumption of energy and time delay.
