CAJ | 학술논문

S模式ADS-B系统的使用可以有效地解决传统雷达监视系统存在监视盲区和监视精度不高的问题。基于FPGA用Verilog HDL完成前导检测环节的设计，可以准确地检测到在四个有序脉冲位置上是否存在前导脉冲，并进一步判断在有效脉冲位置上的前导脉冲的前沿类型，最终完成报头信息的前导检测。测试表明通过该设计可以准确地完成S模式ADS-B系统地面接收机的前导检测。
S모식ADS-B계통적사용가이유효지해결전통뢰체감시계통존재감시맹구화감시정도불고적문제。기우FPGA용Verilog HDL완성전도검측배절적설계，가이준학지검측도재사개유서맥충위치상시부존재전도맥충，병진일보판단재유효맥충위치상적전도맥충적전연류형，최종완성보두신식적전도검측。측시표명통과해설계가이준학지완성S모식ADS-B계통지면접수궤적전도검측。
Using the S Model ADS-B System can effectively solve the problem that the traditional radar has not only the monitoring blind area but also monitoring accurately enough.Through the FPGA implementation of preamble detection with Verilog HDL language design can be accurately de-tected in four orderly pulse position if there is a preamble pulse,and further judgment on the effective pulse position of leading the forefront of pulse type. Test shows that this design can accurately complete preamble detection.