实验技术与管理
實驗技術與管理
실험기술여관리
Experimental Technology and Management
2015年
9期
59-63
,共5页
赵博%黄飞%刘宏银%刘士兴
趙博%黃飛%劉宏銀%劉士興
조박%황비%류굉은%류사흥
幅频特性%嵌入式处理器%DDS%全波整流
幅頻特性%嵌入式處理器%DDS%全波整流
폭빈특성%감입식처리기%DDS%전파정류
amplitude-frequency characteristics%embedded processor%DDS%full-wave rectification
设计了一种基于嵌入式处理器控制的放大电路幅频特性测试系统。采用DDS技术搭配一款模拟乘法器为待测放大电路提供频率、幅值、波形可调的输入信号。信号频率步长为0.04 Hz ,输出范围为0.04 Hz~12.5 M Hz。待测放大电路输出信号首先通过精密全波整流滤波电路进行处理,然后经嵌入式处理器内置ADC采样处理,采样精度最高可达0.8 mV ,以实现交流信号幅值测量和幅频特性曲线的LCD显示。本系统数字集成高,成本低,且操作简单,在高校电子信息类专业的教学中可以得到广泛的应用。
設計瞭一種基于嵌入式處理器控製的放大電路幅頻特性測試繫統。採用DDS技術搭配一款模擬乘法器為待測放大電路提供頻率、幅值、波形可調的輸入信號。信號頻率步長為0.04 Hz ,輸齣範圍為0.04 Hz~12.5 M Hz。待測放大電路輸齣信號首先通過精密全波整流濾波電路進行處理,然後經嵌入式處理器內置ADC採樣處理,採樣精度最高可達0.8 mV ,以實現交流信號幅值測量和幅頻特性麯線的LCD顯示。本繫統數字集成高,成本低,且操作簡單,在高校電子信息類專業的教學中可以得到廣汎的應用。
설계료일충기우감입식처리기공제적방대전로폭빈특성측시계통。채용DDS기술탑배일관모의승법기위대측방대전로제공빈솔、폭치、파형가조적수입신호。신호빈솔보장위0.04 Hz ,수출범위위0.04 Hz~12.5 M Hz。대측방대전로수출신호수선통과정밀전파정류려파전로진행처리,연후경감입식처리기내치ADC채양처리,채양정도최고가체0.8 mV ,이실현교류신호폭치측량화폭빈특성곡선적LCD현시。본계통수자집성고,성본저,차조작간단,재고교전자신식류전업적교학중가이득도엄범적응용。
The testing system of amplitude‐frequency characteristics based on the embedded processor is designed .The input signal ,of which the frequency ,amplitude and waveform are adjustable ,is generated by the DDS technology and an analog multiplier .The step frequency of the input signal is 0 .04 Hz ,and the range is from 0.04 Hz to 12 .5 MHz .The output signal is carried out by the precision full‐wave rectification and filter circuit ,and converted from AC into DC after sampling and processing by the ADC of the embedded processor .The sampling precision is up to 0 .8 mV ,and the amplitude measurement of the AC signal and the LCD display of the amplitude‐frequency characteristics curve are accomplished .This system has high digital integration ,low cost ,simple operation ,etc .It can be widely used in the teaching of electronic information major in colleges and universities .