CAJ | 학술논문

针对传统示波器体积大、携带不便等问题,利用现场可编程门阵列(field programmable gate array,FPGA)强大的性能,研制一款基于 FPGA 的手持式数字示波器。系统以 Altera 公司 FPGA 为主控芯片组建逻辑控制电路,利用 Quartus II 开发工具以及 Verilog HDL 语言描述控制逻辑,实现时钟分配、采样缓冲、触发、测频、测幅等功能。用SOPC Builder 构建 Nios II 软核处理器,通过 C 语言编程实现触摸控制、显示控制等功能。经过实验测试表明,该示波器系统工作稳定,具有较高的性能指标和实用性,在手持式数字示波器的研制方面有较好的参考价值。
침대전통시파기체적대、휴대불편등문제,이용현장가편정문진렬(field programmable gate array,FPGA)강대적성능,연제일관기우 FPGA 적수지식수자시파기。계통이 Altera 공사 FPGA 위주공심편조건라집공제전로,이용 Quartus II 개발공구이급 Verilog HDL 어언묘술공제라집,실현시종분배、채양완충、촉발、측빈、측폭등공능。용SOPC Builder 구건 Nios II 연핵처리기,통과 C 어언편정실현촉모공제、현시공제등공능。경과실험측시표명,해시파기계통공작은정,구유교고적성능지표화실용성,재수지식수자시파기적연제방면유교호적삼고개치。
According to the weakness of traditional oscilloscope problems such as large volume and inconvenience,the project base on FPGA (Field Programmable Gate Array ) strong performance to develop a hand-held digital oscilloscope.The system use Altera FPGA as the main control chip to design a logic control circuit.And it use the Quartus II development tools and Verilog HDL language to describe the functions such as control logic, clock distribution,sampling buffer,trigger,frequency and amplitude measuring,etc.System design the SOPC Builder to build the Nios II soft core processor,and it through the C language programming to realize the touch control,display control functions.The test result shows that the oscilloscope system work is stable,and it has high performance and practicality.The project has reference value in the research of the hand-held digital oscilloscope.