CAJ | 학술논문

基于 CMOS 体驱动，提出低电压放大器抗电磁干扰结构．电路采用部分正反馈结构提高体驱动输入级的等效输入跨导，通过输入电压降结构改善体驱动结构的直流非线性，采用双输入级结构保证放大器良好的交流特性，同时，对称拓扑结构保证了电路的高度对称性，实现了对称的转换速率．该设计采用电源电压为1V 的0．35μm 标准CMOS 工艺实现．对该放大器的抗电磁干扰特性进行理论分析与仿真验证，并同传统体驱动放大器相比较．实验结果表明：该结构的电压失调小于50mV，10kHz 频点的输出功率谱密度相比传统结构降低33dBm．
기우 CMOS 체구동，제출저전압방대기항전자간우결구．전로채용부분정반궤결구제고체구동수입급적등효수입과도，통과수입전압강결구개선체구동결구적직류비선성，채용쌍수입급결구보증방대기량호적교류특성，동시，대칭탁복결구보증료전로적고도대칭성，실현료대칭적전환속솔．해설계채용전원전압위1V 적0．35μm 표준CMOS 공예실현．대해방대기적항전자간우특성진행이론분석여방진험증，병동전통체구동방대기상비교．실험결과표명：해결구적전압실조소우50mV，10kHz 빈점적수출공솔보밀도상비전통결구강저33dBm．
Based on CMOS bulk-driven structure,a low-voltage amplifier with high electromagnetic interference (EMI)im-munity is proposed.In the circuit,a partial positive feedback enhances its effective transconductance and an input voltage-drop struc-ture modifies its direct current (DC)nonlinearity.For the overall amplifier,a dual input-stage guarantees its good alternating current (AC)feature,and a symmetrical topology ensures its symmetry and symmetrical slew rate (SR).The amplifier was implemented in a 0.35μm standard CMOS process using 1V power supply.Theoretical analysis and simulation results for EMI robustness are pre-sented and compared with the classical bulk-driven amplifier.The results show that the offset voltage of the proposed amplifier is less than 50mV and the output power spectrum density (PSD)at 10kHz is 33dBm lower than that of the classical structure.