红外与激光工程
紅外與激光工程
홍외여격광공정
Infrared and Laser Engineering
2015年
10期
2880-2885
,共6页
周杰%丁瑞军%翟永成%梁清华%蒋大钊
週傑%丁瑞軍%翟永成%樑清華%蔣大釗
주걸%정서군%적영성%량청화%장대쇠
双色红外焦平面%读出电路%电容共享%缓冲注入%电荷容量
雙色紅外焦平麵%讀齣電路%電容共享%緩遲註入%電荷容量
쌍색홍외초평면%독출전로%전용공향%완충주입%전하용량
dual-color IRFPA%ROIC%sharing capacitor%BDI%charge capacity
中波与长波探测器的光电流及动态输出阻抗存在数量级的差别.为满足积分时间及读出信号信噪比的要求,采用像元间多电容共享的方案,设计了一种高集成度的320×256双色红外焦平面读出电路.该电路选用直接注入(DI)结构作为中波输入级,而长波输入级则选用了缓冲注入(BDI)结构.其缓冲放大器采用单边结构,具有高增益、低功耗、低噪声的特点,降低了输入阻抗,提高了注入效率.基于HHNEC 0.35μm 2P4M标准CMOS工艺,完成了芯片的设计与制造.经测试,引入电容共享方案后其有效电荷容量达到70 Me-/像元,电路各项功能正常,在光照条件下,芯片呈现出高的灵敏性.在2.5 MHz读出速率下,中波及长波输出电压范围均大于2 V,非线性小于1%.在100 f/s帧频下,整体功耗小于170 mW.
中波與長波探測器的光電流及動態輸齣阻抗存在數量級的差彆.為滿足積分時間及讀齣信號信譟比的要求,採用像元間多電容共享的方案,設計瞭一種高集成度的320×256雙色紅外焦平麵讀齣電路.該電路選用直接註入(DI)結構作為中波輸入級,而長波輸入級則選用瞭緩遲註入(BDI)結構.其緩遲放大器採用單邊結構,具有高增益、低功耗、低譟聲的特點,降低瞭輸入阻抗,提高瞭註入效率.基于HHNEC 0.35μm 2P4M標準CMOS工藝,完成瞭芯片的設計與製造.經測試,引入電容共享方案後其有效電荷容量達到70 Me-/像元,電路各項功能正常,在光照條件下,芯片呈現齣高的靈敏性.在2.5 MHz讀齣速率下,中波及長波輸齣電壓範圍均大于2 V,非線性小于1%.在100 f/s幀頻下,整體功耗小于170 mW.
중파여장파탐측기적광전류급동태수출조항존재수량급적차별.위만족적분시간급독출신호신조비적요구,채용상원간다전용공향적방안,설계료일충고집성도적320×256쌍색홍외초평면독출전로.해전로선용직접주입(DI)결구작위중파수입급,이장파수입급칙선용료완충주입(BDI)결구.기완충방대기채용단변결구,구유고증익、저공모、저조성적특점,강저료수입조항,제고료주입효솔.기우HHNEC 0.35μm 2P4M표준CMOS공예,완성료심편적설계여제조.경측시,인입전용공향방안후기유효전하용량체도70 Me-/상원,전로각항공능정상,재광조조건하,심편정현출고적령민성.재2.5 MHz독출속솔하,중파급장파수출전압범위균대우2 V,비선성소우1%.재100 f/s정빈하,정체공모소우170 mW.
The photocurrent and dynamic output impedance of MW detectors differentiate from LW by several orders of magnitude. For the requirement in integrating time and readout SNR, a designing scheme of a highly integrated readout circuit for 320×256 dual-color infrared focal plane arrays(IRFPAs) was proposed by adopting a sharing methods between pixel capacitors. In this circuit, the DI structure was chosen as the MW injection stage and the BDI structure was used for LW. The buffered amplifier had a unilateral structure which always performanced with high gain, low consumption and low noise, thus it reduced the input impedance and improved the injection efficiency. The chip was designed and manufactured based on HHNEC 0.35μm 2P4M standard CMOS process. In the testing process, this chip presented a normal operating state and was sensitive enough to the change of illumination. The total effective charge capacity reached 70 Me-/pixel. Under 2.5 MHz output speed, the output swings of MW and LW were larger than 2 V and the nonlinearity less than 1%. The total power consumption was less than 170 mW when working with the frame rate of 100 f/s.