核技术
覈技術
핵기술
Nuclear Techniques
2015年
10期
100101-100105
,共5页
耿合龙%冷用斌%周伟民%赖龙伟%沈通%阎映炳
耿閤龍%冷用斌%週偉民%賴龍偉%瀋通%閻映炳
경합룡%랭용빈%주위민%뢰룡위%침통%염영병
上海光源%束流测量%轨道联锁%FPGA
上海光源%束流測量%軌道聯鎖%FPGA
상해광원%속류측량%궤도련쇄%FPGA
SSRF%Beam diagnostics system%Beam orbit interlock%FPGA
针对上海光源机器故障分析的需求,对原有储存环束流轨道联锁系统进行升级,实现对储存环束流位置测量系统中140台束流位置监测器(Beam Position Monitor, BPM)电子学输出的联锁信号进行标记,同时锁存丟束过程中所有BPM电子学中的逐圈轨道数据。联锁信号的处理与锁存触发信号的输出在FPGA (Field Programmable Gate Array)内完成。该系统集成至储存环的物理实验与工业控制系统(Experimental Physics and Industrial Control System, EPICS)控制系统之中。束流检测实验表明,该系统能够准确区分不同BPM电子学输出的联锁信号,同时锁存丟束时逐圈轨道数据,并通过该系统观测到了储存环束流丢失过程中的逐圈轨道变化。
針對上海光源機器故障分析的需求,對原有儲存環束流軌道聯鎖繫統進行升級,實現對儲存環束流位置測量繫統中140檯束流位置鑑測器(Beam Position Monitor, BPM)電子學輸齣的聯鎖信號進行標記,同時鎖存丟束過程中所有BPM電子學中的逐圈軌道數據。聯鎖信號的處理與鎖存觸髮信號的輸齣在FPGA (Field Programmable Gate Array)內完成。該繫統集成至儲存環的物理實驗與工業控製繫統(Experimental Physics and Industrial Control System, EPICS)控製繫統之中。束流檢測實驗錶明,該繫統能夠準確區分不同BPM電子學輸齣的聯鎖信號,同時鎖存丟束時逐圈軌道數據,併通過該繫統觀測到瞭儲存環束流丟失過程中的逐圈軌道變化。
침대상해광원궤기고장분석적수구,대원유저존배속류궤도련쇄계통진행승급,실현대저존배속류위치측량계통중140태속류위치감측기(Beam Position Monitor, BPM)전자학수출적련쇄신호진행표기,동시쇄존주속과정중소유BPM전자학중적축권궤도수거。련쇄신호적처리여쇄존촉발신호적수출재FPGA (Field Programmable Gate Array)내완성。해계통집성지저존배적물리실험여공업공제계통(Experimental Physics and Industrial Control System, EPICS)공제계통지중。속류검측실험표명,해계통능구준학구분불동BPM전자학수출적련쇄신호,동시쇄존주속시축권궤도수거,병통과해계통관측도료저존배속류주실과정중적축권궤도변화。
Background: Required by machine malfunction analysis, the beam orbit interlock system for the storage ring needs to be upgraded at the Shanghai Synchrotron Radiation Facility (SSRF). Purpose: This study aims to implement an upgraded new interlock system that can label 140 interlock signals coming from different Beam Position Monitor (BPM) electronics and record all data in the new system. And the turn-by-turn data in the BPM electronics Post Mortem buffer will be latched whenever the interlock occurs. Methods: The interlock signals and the latch signals were transmitted through the optical fiber and processed in an NI PXI 7813R Field Programmable Gate Array (FPGA) board. NI PXI-8106 controller is configured to run Linux operation system for Input/Output Controller (IOC) of Experimental Physics and Industrial Control System (EPICS) and communicate with PXI 7813R board which processes all interlock signals. Results: All interlock signal processing and latched trigger signal output were achieved in the FPGA board. The new system was fully integrated to the main EPICS for the storage ring. And the system runs as expected. Conclusions: The online test data show that the new system can detect the first interlock signal caused by the machine abnormality while the turn-by-turn data are latched. The analysis of turn-by-turn data shows the first BPM electronics which sends the interlock signal. The result is consistent with the FPGA board. Meanwhile, beam orbit changes were observed during beam abortions.