CAJ | 학술논문

电容阵列数模转换器（DAC）是逐次逼近型模数转换器（SAR ADC）的主要能耗来源之一．为降低电容阵列 DAC 的能耗，提出了一种高能效电容阵列 DAC 结构，该结构电容阵列中各电容单元通过开关依次连接．在前两次比较周期中，由于采用了顶板采样和电压移位技术，电容阵列 DAC 没有产生能耗；在之后的比较周期中，由于采用电荷共享和电压单调降低技术，电容阵列 DAC 产生了很少的能耗．仿真结果表明，相比于传统的电容阵列 DAC结构，文中提出的高能效电容阵列 DAC 结构可降低99．22％的能耗，节省75％的面积．
전용진렬수모전환기（DAC）시축차핍근형모수전환기（SAR ADC）적주요능모래원지일．위강저전용진렬 DAC 적능모，제출료일충고능효전용진렬 DAC 결구，해결구전용진렬중각전용단원통과개관의차련접．재전량차비교주기중，유우채용료정판채양화전압이위기술，전용진렬 DAC 몰유산생능모；재지후적비교주기중，유우채용전하공향화전압단조강저기술，전용진렬 DAC 산생료흔소적능모．방진결과표명，상비우전통적전용진렬 DAC결구，문중제출적고능효전용진렬 DAC 결구가강저99．22％적능모，절성75％적면적．
Capacitor array digital-to-analogue converter (DAC)is one of the main energy consumption sources of successive approximation register analogue-to-digital converter (SAR ADC).In order to reduce the energy con-sumption of capacitor array DAC,this paper proposes a high energy-efficient capacitor array DAC structure.In the structure,each capacitor part is connected in turn through a switch.In the first two comparison cycles,owing to the top-plate sampling technique and the level shift technique,there is no switching energy consumption in the capaci-tor array DAC;in the rest of comparison cycles from the third to the nth,owing to the charge sharing technique and the voltage monotonic down technique,there exists a low switching energy consumption in the capacitor array DAC. Simulation results show that,in comparison with the traditional capacitor array DAC structure,the proposed struc-ture can decrease the energy consumption by 99.22% and reduce the number of capacitors by 75%.