基于CMOS集成电路闩锁效应理论的实践
기우CMOS집성전로산쇄효응이론적실천
Practice-based CMOS IC latch-up theory
  • 万方数据
    电子测试 전자측시
    Electronic Test
    2015年 18期 42-43 ,共2页

    樊海霞%朱纯仁

    번해하%주순인

    COMS集成电路%闩锁%单片机 COMS集成電路%閂鎖%單片機
    COMS집성전로%산쇄%단편궤
    CMOS integrated circuit%latch%SCM
    本文针对CMOS集成电路的闩锁效应产生的原因,结合实际调试过程中的案例,探索芯片内部发生闩锁效应后的故障表现并提出避免方法以及解决方案.
    본문침대CMOS집성전로적산쇄효응산생적원인,결합실제조시과정중적안례,탐색심편내부발생산쇄효응후적고장표현병제출피면방법이급해결방안.
    The reason this paper latch CMOS integrated circuits produced actual debugging process cases, failure to explore the performance of the chip after latch and suggests ways to avoid and solutions.
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