CAJ | 학술논문

通过将数据与时钟的转变沿进行对比,检验其是否同步,设计了一种改进的基于时钟沿的单粒子翻转自检纠错电路结构,来实现数据翻转错误的检测和纠正. 该电路在保持原有电路优点的同时,克服了原电路的不足,既可完成上升沿和下跳沿错误检测,又可以同时实现多位SEU错误的检测纠正. 仿真和实际应用均表明,所提出的改进电路是一个有实用价值的检错纠错电路.
통과장수거여시종적전변연진행대비,검험기시부동보,설계료일충개진적기우시종연적단입자번전자검규착전로결구,래실현수거번전착오적검측화규정. 해전로재보지원유전로우점적동시,극복료원전로적불족,기가완성상승연화하도연착오검측,우가이동시실현다위SEU착오적검측규정. 방진화실제응용균표명,소제출적개진전로시일개유실용개치적검착규착전로.
Based on the clock edge, an improved error detection and correction ( EDAC) circuit for single event upset ( SEU) is proposed in this paper. The circuit can implement the data error detection and correction through determining whether the data and clock are asynchronous or not. It keeps the advantages and overcomes the short?comings of the EDAC circuit and it can not only complete detection under clock rising or falling edge but also a?chieve multi?bit SEU error detection and correction. The simulation results and their analysis show preliminarily that the proposed improved EDAC circuit is indeed better.