电测与仪表
電測與儀錶
전측여의표
Electrical Measurement & Instrumentation
2015年
19期
11-17
,共7页
罗必露%黄琦%曹瓅月%李坚%井实
囉必露%黃琦%曹瓅月%李堅%井實
라필로%황기%조력월%리견%정실
时间数字转换器%FPGA%周期计数值%恒温晶振
時間數字轉換器%FPGA%週期計數值%恆溫晶振
시간수자전환기%FPGA%주기계수치%항온정진
time to digital converter%Field Programmable Gata Array%oven controlled crystal oscillator%period counter
针对全场景试验系统主时钟终端的时钟源频率精度低和稳定性不足的问题,文中提出了一种简单有效的恒温晶振校准方法. 该方法基于FPGA时间系统建立的原理,通过TDC (时间数字转换器)测得的恒温晶振与GPS秒脉冲之间的周期偏差值,修改FPGA内部计数器的周期计数值,达到校准主时钟频率的目的. 为降低GPS信号抖动的影响,采用滑动平均滤波算法,实现恒温晶振的快速驯服. 通过仿真和试验测试,驯服后主时钟平均频率精度高于5 ×10 -10 ,守时精度优于1.8μ/h.
針對全場景試驗繫統主時鐘終耑的時鐘源頻率精度低和穩定性不足的問題,文中提齣瞭一種簡單有效的恆溫晶振校準方法. 該方法基于FPGA時間繫統建立的原理,通過TDC (時間數字轉換器)測得的恆溫晶振與GPS秒脈遲之間的週期偏差值,脩改FPGA內部計數器的週期計數值,達到校準主時鐘頻率的目的. 為降低GPS信號抖動的影響,採用滑動平均濾波算法,實現恆溫晶振的快速馴服. 通過倣真和試驗測試,馴服後主時鐘平均頻率精度高于5 ×10 -10 ,守時精度優于1.8μ/h.
침대전장경시험계통주시종종단적시종원빈솔정도저화은정성불족적문제,문중제출료일충간단유효적항온정진교준방법. 해방법기우FPGA시간계통건립적원리,통과TDC (시간수자전환기)측득적항온정진여GPS초맥충지간적주기편차치,수개FPGA내부계수기적주기계수치,체도교준주시종빈솔적목적. 위강저GPS신호두동적영향,채용활동평균려파산법,실현항온정진적쾌속순복. 통과방진화시험측시,순복후주시종평균빈솔정도고우5 ×10 -10 ,수시정도우우1.8μ/h.
Aiming at the problem of low accuracy and insufficient stability of frequency of master clock terminal of whole-view test system, the paper presents a simple and effective method to correct frequency of OCXO ( oven con-trolled crystal oscillator) .Based on the principle of time system within FPGA( Field Programmable Gata Array) estab-lishment , the method measured the periodic deviation between OCXO and GPS through TDC ( Time to Digital Convert-er) , modified the value of period within FPGA, reaching the purpose of frequency correction.In order to reduce the impact of GPS signal jitter, the moving average filter algorithm is used to tame OCXO quickly.Simulation and experi-mental results show that the clock frequency accuracy is higher than the average 5 ×10 -10 , and the time accuracy is better than 1.8μ/h, after OCXO was tamed.