电子设计工程
電子設計工程
전자설계공정
Electronic Design Engineering
2015年
22期
98-100,104
,共4页
电压基准%线性稳压器%低静态电流%温度系数
電壓基準%線性穩壓器%低靜態電流%溫度繫數
전압기준%선성은압기%저정태전류%온도계수
voltage reference%linear regulator%low-quiescent current%temperature coefficient
电压基准是LDO线性稳压器的核心部分,它的精度直接影响到输出电压的精度.本文针对低功耗LDO线性稳压器一方面有较低的静态电流的要求,另一方面又有较高的精度要求,提出了一种简单实用的电压基准电路.本电路采用 TSMC 0.18 μm 混合信号 CMOS 工艺,仿真结果显示,输出基准电压为 1.213 V,静态电流为 538 nA,在-55~125 ℃温度范围内,温度系数仅为10.58 ppm/℃,低频时的电源抑制比为-85 dB.
電壓基準是LDO線性穩壓器的覈心部分,它的精度直接影響到輸齣電壓的精度.本文針對低功耗LDO線性穩壓器一方麵有較低的靜態電流的要求,另一方麵又有較高的精度要求,提齣瞭一種簡單實用的電壓基準電路.本電路採用 TSMC 0.18 μm 混閤信號 CMOS 工藝,倣真結果顯示,輸齣基準電壓為 1.213 V,靜態電流為 538 nA,在-55~125 ℃溫度範圍內,溫度繫數僅為10.58 ppm/℃,低頻時的電源抑製比為-85 dB.
전압기준시LDO선성은압기적핵심부분,타적정도직접영향도수출전압적정도.본문침대저공모LDO선성은압기일방면유교저적정태전류적요구,령일방면우유교고적정도요구,제출료일충간단실용적전압기준전로.본전로채용 TSMC 0.18 μm 혼합신호 CMOS 공예,방진결과현시,수출기준전압위 1.213 V,정태전류위 538 nA,재-55~125 ℃온도범위내,온도계수부위10.58 ppm/℃,저빈시적전원억제비위-85 dB.
Voltage reference is the core of LDO linear regulator. Its precision decides the accuracy of LDO output voltage directly. Low-power LDO linear regulator needs low-quiescent current on one hand, and high precision on the other hand. Based on the two major requirements, a simple but useful voltage reference is proposed in this paper. The circuit has been implemented in a TSMC 0.18-um mixed-signal CMOS technology. The simulation results show that it can output a steady voltage of 1.213V, and only dissipates 538nA quiescent current. The circuit also achieves a good temperature coefficient of 10.58ppm/oC over the temperature range of-55℃to 125℃. And the PSR can be reduced to-85 dB at low frequency.
