CAJ | 학술논문

针对射频识别技术（ RFID）迅猛发展的需求，采用0.18μm CMOS工艺设计并制造了一种电容式传感器接口电路。该接口电路为全数字结构，能将传感器电容值转换到频域进行处理。它采用了一种新型的内部限幅的环形振荡器结构，比传统反相器结构振荡器降低了约30％功耗。后期测试结果显示，所设计的集成接口电路获得了良好的线性度和稳定性能，占用0.21 mm2芯片面积，1 V电源电压下仅消耗0.92μW功率，尤其适合于无源RFID传感器标签设计中。
침대사빈식별기술（ RFID）신맹발전적수구，채용0.18μm CMOS공예설계병제조료일충전용식전감기접구전로。해접구전로위전수자결구，능장전감기전용치전환도빈역진행처리。타채용료일충신형적내부한폭적배형진탕기결구，비전통반상기결구진탕기강저료약30％공모。후기측시결과현시，소설계적집성접구전로획득료량호적선성도화은정성능，점용0.21 mm2심편면적，1 V전원전압하부소모0.92μW공솔，우기괄합우무원RFID전감기표첨설계중。
According to the rapid development of Radio Frequency IDentification ( RFID) , this paper presented an integrated capacitive sensor interface using 0.18 μm complementary metal oxide semiconductor technology .The proposed interface employed fully-digital architecture and processed the sensor value in frequency domain .The sensor interface presented an internal-amplitude-limiting ring oscillator , resulting in a reduction in power dissipation by almost 30%.Measurement results show the proposed inte-grated capacitive sensor interface achieves excellent linearity and stability .The proposed interface covers 0.21 mm2 chip area and consumes only 0.92 μW power , which proves especially suitable for passive RFID tag design .