计算机工程与应用
計算機工程與應用
계산궤공정여응용
COMPUTER ENGINEERING AND APPLICATIONS
2014年
6期
261-264,270
,共5页
聂明星%蒋新华%李光炀%陈兴武%朱娜思
聶明星%蔣新華%李光煬%陳興武%硃娜思
섭명성%장신화%리광양%진흥무%주나사
非均匀有理B样条(NURBS)%插补器%嵌入式微处理器-现场可编程逻辑阵列(ARM-FPGA)%计算负载
非均勻有理B樣條(NURBS)%插補器%嵌入式微處理器-現場可編程邏輯陣列(ARM-FPGA)%計算負載
비균균유리B양조(NURBS)%삽보기%감입식미처리기-현장가편정라집진렬(ARM-FPGA)%계산부재
Non-Uniform Rational B-Spline(NURBS)%interpolator%Advanced Reduced instruction set computer Machines-Field Programmable Gate Array(ARM-FPGA)%computational load
针对非均匀有理B样条（Non-Uniform Rational B-Spline，NURBS）曲线高速高精加工过程中计算负载高的问题，提出基于ARM-FPGA嵌入式技术的NURBS曲线插补硬件平台，对硬件平台结构进行了设计，利用读写下降沿同步信号解决ARM与FPGA跨时钟域总线传输问题，自主开发了ARM-FPGA嵌入式硬件平台。该平台结构具有小型化、智能化特点，在硬件平台上经实际测试表明，ARM与FPGA之间数据传输稳定可靠，能有效降低单一处理器的计算负载。
針對非均勻有理B樣條（Non-Uniform Rational B-Spline，NURBS）麯線高速高精加工過程中計算負載高的問題，提齣基于ARM-FPGA嵌入式技術的NURBS麯線插補硬件平檯，對硬件平檯結構進行瞭設計，利用讀寫下降沿同步信號解決ARM與FPGA跨時鐘域總線傳輸問題，自主開髮瞭ARM-FPGA嵌入式硬件平檯。該平檯結構具有小型化、智能化特點，在硬件平檯上經實際測試錶明，ARM與FPGA之間數據傳輸穩定可靠，能有效降低單一處理器的計算負載。
침대비균균유리B양조（Non-Uniform Rational B-Spline，NURBS）곡선고속고정가공과정중계산부재고적문제，제출기우ARM-FPGA감입식기술적NURBS곡선삽보경건평태，대경건평태결구진행료설계，이용독사하강연동보신호해결ARM여FPGA과시종역총선전수문제，자주개발료ARM-FPGA감입식경건평태。해평태결구구유소형화、지능화특점，재경건평태상경실제측시표명，ARM여FPGA지간수거전수은정가고，능유효강저단일처리기적계산부재。
This paper proposes an NURBS curve interpolation hardware platform based on ARM-FPGA embedded tech-nology to achieve the purpose of high-speed and high-accuracy motion control. The hardware structure is designed. Then, the cross clock domain problem between ARM and FPGA is solved by using R/W falling edge as synchronization signal. The ARM-FPGA embedded hardware platform is developed independently. The practical test shows that data transfer between ARM and FPGA is reliable, and the proposed architecture would effectively reduce the computational load of NURBS curve interpolation in one single processor.
