现代电子技术
現代電子技術
현대전자기술
MODERN ELECTRONICS TECHNIQUE
2013年
14期
123-126
,共4页
单文军%周雪纯%李文华
單文軍%週雪純%李文華
단문군%주설순%리문화
FPGA%DSP Builder%FIR数字滤波器%ModelSim功能仿真
FPGA%DSP Builder%FIR數字濾波器%ModelSim功能倣真
FPGA%DSP Builder%FIR수자려파기%ModelSim공능방진
FPGA%DSP Builder%FIR digital filter%ModelSim function simulation
简要介绍了FIR数字滤波器的结构特点和基本原理，提出基于FPGA和DSP Builder的FIR数字滤波器的基本设计流程和实现方案。在Matlab/Simulink环境下，采用DSP Builder模块搭建FIR模型，根据FDATool工具对FIR滤波器进行了设计，然后进行系统级仿真和ModelSim功能仿真，其仿真结果表明其数字滤波器的滤波效果良好。通过SignalCompiler把模型转换成VHDL语言加入到FPGA的硬件设计中，从QuartusⅡ软件中的虚拟逻辑分析工具SignalTapⅡ中得到数字滤波器实时的结果波形图，结果符合预期。
簡要介紹瞭FIR數字濾波器的結構特點和基本原理，提齣基于FPGA和DSP Builder的FIR數字濾波器的基本設計流程和實現方案。在Matlab/Simulink環境下，採用DSP Builder模塊搭建FIR模型，根據FDATool工具對FIR濾波器進行瞭設計，然後進行繫統級倣真和ModelSim功能倣真，其倣真結果錶明其數字濾波器的濾波效果良好。通過SignalCompiler把模型轉換成VHDL語言加入到FPGA的硬件設計中，從QuartusⅡ軟件中的虛擬邏輯分析工具SignalTapⅡ中得到數字濾波器實時的結果波形圖，結果符閤預期。
간요개소료FIR수자려파기적결구특점화기본원리，제출기우FPGA화DSP Builder적FIR수자려파기적기본설계류정화실현방안。재Matlab/Simulink배경하，채용DSP Builder모괴탑건FIR모형，근거FDATool공구대FIR려파기진행료설계，연후진행계통급방진화ModelSim공능방진，기방진결과표명기수자려파기적려파효과량호。통과SignalCompiler파모형전환성VHDL어언가입도FPGA적경건설계중，종QuartusⅡ연건중적허의라집분석공구SignalTapⅡ중득도수자려파기실시적결과파형도，결과부합예기。
The structure feature and the basic principle of FIR digital filter is introduced briefly. The basic design process and implementation scheme of the FIR digital filter based on FPGA and DSP Builder is proposed in this paper. FIR model is structured with DSP Builder module in the Matlab/Simulink environment. The FIR digital filter is designed according to the FDA?Tool. The system level simulation and ModelSim function simulation were completed. The simulation results show that the filter has excellent effect. The model is converted to VHDL language through SingalCompiler and added to FPGA hardware design. The real?time waveform graph of the FIR digital filter was received by the virtual logic analysis tool SignalTapⅡ in QuartusⅡ. The results conform to the expected requirement.
