现代电子技术
現代電子技術
현대전자기술
Modern Electronics Technique
2015年
23期
37-40
,共4页
DDS%CORDIC 算法%Δ-Σ调制器%正弦信号源
DDS%CORDIC 算法%Δ-Σ調製器%正絃信號源
DDS%CORDIC 산법%Δ-Σ조제기%정현신호원
DDS%CORDIC algorithm%Δ-Σ modulator%sinusoidal signal source
为了节约硬件资源，同时获得高信噪比的正弦信号，采用CORDIC算法和Δ?Σ调制器产生DDS正弦信号，由CORDIC产生多比特的正弦信号数据，再利用Δ?Σ调制技术把多比特的正弦信号转换为1 b的数据流，最后经过低通滤波器滤除混叠的频谱得到正弦信号，这种技术优势在于精度高、成本低、硬件结构简单。通过仿真及硬件测试，所设计的 DDS 无杂散动态范围可达到56.1 dBc，信噪比在100 dB以上，幅度衰减误差小于0.5%，表明该方法具有分辨率高、速度快和频谱杂散小等优点。
為瞭節約硬件資源，同時穫得高信譟比的正絃信號，採用CORDIC算法和Δ?Σ調製器產生DDS正絃信號，由CORDIC產生多比特的正絃信號數據，再利用Δ?Σ調製技術把多比特的正絃信號轉換為1 b的數據流，最後經過低通濾波器濾除混疊的頻譜得到正絃信號，這種技術優勢在于精度高、成本低、硬件結構簡單。通過倣真及硬件測試，所設計的 DDS 無雜散動態範圍可達到56.1 dBc，信譟比在100 dB以上，幅度衰減誤差小于0.5%，錶明該方法具有分辨率高、速度快和頻譜雜散小等優點。
위료절약경건자원，동시획득고신조비적정현신호，채용CORDIC산법화Δ?Σ조제기산생DDS정현신호，유CORDIC산생다비특적정현신호수거，재이용Δ?Σ조제기술파다비특적정현신호전환위1 b적수거류，최후경과저통려파기려제혼첩적빈보득도정현신호，저충기술우세재우정도고、성본저、경건결구간단。통과방진급경건측시，소설계적 DDS 무잡산동태범위가체도56.1 dBc，신조비재100 dB이상，폭도쇠감오차소우0.5%，표명해방법구유분변솔고、속도쾌화빈보잡산소등우점。
To save hardware resources and obtain the sinusoidal signal with high signal?to?noise ratio,the CORDIC(coordi?nation rotation digital computer)algorithm and Δ?Σ modulator are adopted to generate DDS sinusoidal signal. The multi?bit data of the sinusoidal signal is generated by CORDIC algorithm,then the sinusoidal signal is converted into data flow of 1 bit by means of Δ?Σ modulation technology,and the sinusoidal signal is obtained by filtering the aliasing frequency spectrum through low?pass filter. The advantages of this technology are high accuracy,low cost and simple hardware structure. The simulation and hardware test results show that the designed DDS spurious?free dynamic range(SFDR)can reach up to 56.1 dBc,the signal?to?noise ratio is better than 100 dB,and the amplitude attenuation error is less than 0.5%,which indicate that the method has the advantages of high frequency resolution,fast speed and less stray frequency spectrum.
